The present invention relates to a nonvolatile semiconductor memory device and, more particularly, to a nonvolatile semiconductor memory device of a floating-gate type.
In general, a floating-gate type nonvolatile semiconductor memory device comprises two gates: a floating-gate and a control gate. In an N-channel device, for example, accumulation of electrons in the floating-gate results in a high threshold value, while expulsion of electrons from the floating-gate results in a low threshold value. Such two states correspond to the information "1" and "0". Most of the floating-gate type devices use the tunnel effect for both the write and erase operations. Even a FAMOS (Floating-Gate Avalanche-Injection MOS) device, which is a kind of floating-gate type device, uses the tunnel effect for the erase operation. In this case, however, the insulating layer, such as silicon dioxide (SiO.sub.2), built between the floating-gate and the control gate would have to be thin enough to allow carriers to a tunnel through. For example, the thickness of the insulating layer of SiO.sub.2 would have to be about 30 .ANG., which is difficult to manufacture. The insulating layer can be thick, but this would necessitate the application of a high voltage to the control gate, which would result in electrostatic destruction of the insulating layer.